AZC199-02S low capacitance high esd level protection array for high speed i/o port features description z esd protect for 2 high-speed i/o lines AZC199-02S is a design which includes esd rated diode arrays to protect high speed data interfaces. the AZC199-02S has been specifically designed to protect sensitive components which are connected to data and transmission lines from over-voltage caused by electrostatic discharging (esd). z provide esd protection for each line to iec 61000-4-2,(esd) (contact/air) 16kv iec 61000-4-4 (eft) level-3, 55a (5/50ns) iec 61000-4-5 (lightning) 5a (8/20 s) z for low operating voltage applications: 5v, 4.2v, 3.3v, 2.5v etc. z low capacitance : 1.6pf typical AZC199-02S is a unique design which includes esd rated, low capacitance steering diodes and a unique design of clamping cell which is an equivalent tvs diode in a single package. during transient conditions, the steering diodes direct the transient to ground line. the internal unique design of clamping cell prevents over-voltage on the data line, protecting any downstream components. z fast turn-on and low clamping voltage z array of esd rated diodes with internal equivalent tvs diode z solid-state silicon-avalanche and active circuit triggering technology z green part applications z video graphics cards AZC199-02S may be used to meet the esd immunity requirements of iec 61000-4-2, level 4 ( 15kv air, 8kv contact discharge). z digital visual interface (dvi) z usb2.0 power and data lines protection z notebook and pc computers z monitors and flat panel displays circuit diagram 1 3 2 pin configuration 3 1 2 gnd i/o i/o jedec sot23-3l (top view) revision 2009/03/12 ?2009 amazing micro. 1 www.amazingic.com
AZC199-02S low capacitance high esd level protection array for high speed i/o port revision 2009/03/12 ?2009 amazing micro. 2 www.amazingic.com specifications absolute maximum ratings parameter parameter rating units peak pulse current (tp =8/20 s) i pp 5 a operating supply voltage v dc 6 v esd per iec 61000-4-2 (air/contact) v esd 16 kv lead soldering temperature t sol 260 (10 sec.) o c operating temperature t op -55 to +85 o c storage temperature t sto -55 to +150 o c dc voltage at any i/o pin v io (gnd ? 0.5) to (vdd + 0.5) v electrical characteristics parameter symbol conditions min typ max units leakage current i leak v pin1 or pin2 = 5v, v pin3 = 0v, t=25 o c 1 a reverse breakdown voltage v bv i bv = 1ma, t=25 o c, pin 1/2 to pin 3 7 10 v forward voltage v f i f = 15ma, t=25 o c, pin 3 to pin1/2 0.85 1.1 v esd clamping voltage v clamp iec 61000-4-2 +6kv, t=25 o c, contact mode, pin 1/2 to pin 3 11 v esd dynamic turn on resistance r dynamic iec 61000-4-2 0~+6kv,t=25 o c, contact mode, pin 1/2 to pin 3 0.3 lightning clamping voltage v lightning i pp =5a, tp=8/20 s, t=25 o c pin 1/2 to pin 3 8.5 v channel input capacitance c in v pin3 =0v, v pin1 or 2 =2.5v , f=1mhz,t=25 o c, pin 1/2 to pin 3 1.6 1.9 pf channel to channel input capacitance c cross v pin3 =0v, v pin1 or 2 =2.5v , f=1mhz, t=25 o c, between pin 1 and pin 2 0.23 0.28 pf variation of channel input capacitance c in v pin3 =0v, v pin1 or 2 =2.5v , f=1mhz, t=25 o c, (pin 1 to pin 3)?(pin 2 to pin 3) 0.06 0.08 pf
AZC199-02S low capacitance high esd level protection array for high speed i/o port typical characteristics input voltage (v) 0.00.51.01.52.02.53.03.54.04.55.0 input capacitance (pf) 0.0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 typical variation of c in vs. v in f = 1mhz, t=25 o c, input voltage (v) 0.00.51.01.52.02.53.03.54.04.55.0 input capacitance (pf) 0.00 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 0.45 0.50 typical variation of c io-to-io vs. v in f = 1mhz, t=25 o c, peak pulse current (a) 4.5 5.0 5.5 6.0 6.5 7.0 clamping voltage (v) 0 1 2 3 4 5 6 7 8 9 10 11 12 clamping voltage vs. peak pulse current waveform parameters: tr=8 s td=20 s peak pulse current (a) 4.5 5.0 5.5 6.0 6.5 7.0 7.5 8.0 8.5 forward clamping voltage (v) 0 1 2 3 4 5 forward clamping voltage vs. peak pulse current waveform parameters: tr=8 s td=20 s transmission line pulsing (tlp) measurement transmission line pulsing (tlp) voltage (v) 024681012 transmission line pulsing (tlp) current (a) 0 2 4 6 8 10 12 14 16 18 v_pulse 100ns pulse from a transmission line dut tlp_i + - tlp_v i/o to gnd revision 2009/03/12 ?2009 amazing micro. 3 www.amazingic.com
AZC199-02S low capacitance high esd level protection array for high speed i/o port applications information in order to obtain enough suppression of esd induced transient, good circuit board is critical. thus, the following guidelines are recommended: the AZC199-02S is designed to protect two lines against system esd/eft/lightning pulses by clamping them to an acceptable reference. z minimize the path length between the protected lines and the AZC199-02S. z place the AZC199-02S near the input terminals or connectors to restrict transient coupling. the usage of the AZC199-02S is shown in fig. 1. protected lines, such as data lines, control lines, or power lines, are connected at pin 1 and 2. the pin 3 should be connected directly to a ground plane on the board. all path lengths connected to the pins of AZC199-02S should be kept as short as possible to minimize parasitic inductance in the board traces. z the esd current return path to ground should be kept as short as possible. z use ground planes whenever possible. z never route critical signals near board edges and near the lines which the esd transient easily injects to. connector high speed io ports ic to be protected vdd data-1 data-2 control-1 gnd AZC199-02S 3 1 2 AZC199-02S 3 1 2 fig. 1 revision 2009/03/12 ?2009 amazing micro. 4 www.amazingic.com
AZC199-02S low capacitance high esd level protection array for high speed i/o port fig. 2 shows another simplified example of using AZC199-02S to protect the control lines, high speed data lines, and power lines from esd transient stress. chip-a chip-b chip-c high speed data line high speed data line control line control line vdd vcc gnd AZC199-02S 3 1 2 AZC199-02S 3 1 2 AZC199-02S 3 1 2 fig. 2 revision 2009/03/12 ?2009 amazing micro. 5 www.amazingic.com
AZC199-02S low capacitance high esd level protection array for high speed i/o port mechanical details sot23-3l package diagrams top view side view end view package dimensions revision 2009/03/12 ?2009 amazing micro. 6 www.amazingic.com
AZC199-02S low capacitance high esd level protection array for high speed i/o port land layout 0.95mm 0.95mm 3.5mm 0.7mm 1.4mm 1.4mm 0.9mm 0.9mm 0.9mm 1.0mm notes: this land layout is for reference purposes only. please consult your manufacturing partners to ensure your company?s pcb design guidelines are met. marking code 3 1 2 c11xy part number marking code AZC199-02S c11xy c11 = device code x = date code y = control code revision 2009/03/12 ?2009 amazing micro. 7 www.amazingic.com
AZC199-02S low capacitance high esd level protection array for high speed i/o port revision 2009/03/12 ?2009 amazing micro. 8 www.amazingic.com revision history revision modification description revision 2009/03/12 init ial formal release.
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